1. Field of the Invention
The present invention relates to a memory system including a nonvolatile semiconductor memory.
2. Description of the Related Art
In recent years, nonvolatile semiconductor storage devices such as a flash memory for storing information according to an amount of accumulated charges are widely known. Recently, a capacity of a NAND flash memory is increased. A personal computer incorporating the NAND flash memory as a secondary storage device is put to practical use.
The NAND flash memory is configured by arraying a plurality of NAND cell units. The NAND cell units are connected in series such that adjacent memory cells share a source/drain diffusion layer.
In the NAND flash memory, a multi-value storage system that can store multi-bit information in one memory cell is often adopted to store larger volume data. For example, in a quaternary data storage system for storing two bits in one memory cell, quaternary data “xy” defined by higher-order page data “x” and lower-order page data “y” is used (see, for example, Japanese Patent No. 3935139).
As the quaternary data “xy”, for example, data “11”, “01”, “00”, and “10” are defined in order of threshold voltages of memory cells. The data “11” indicates an erasing state in which the threshold voltage of the memory cells is negative. The data “10” is selectively written in the memory cells in this erasing state according to writing of lower-order bit data “y”. Writing of higher-order bit data “x” is selectively performed and the data “00” and the data “01” are respectively written in the memory cell of the data “10” and the memory cell of the data “11”.
In this way, in writing of quaternary data, write processing for lower-order page data and write processing for higher-order page data are necessary. If the write processing for higher-order page data is abnormally finished or forced to be suspended by a suspension command input or the like, the memory cell as a target of the write processing is in an incomplete threshold voltage state halfway in writing. In this unfinished state, readout of the lower-order page data normally written in the memory cells is likely to be impossible either.